Technical Program
Highlights
Full program below.
Tutorials and Workshops are scheduled on Saturday and Sunday.
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Sunday |
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18:30 - 21:00 |
Welcome Reception |
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Monday |
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| 8:30 | Welcome Address |
| 8:45-9:45 |
Keynote Bill Dally, "Moving the needle: Effective Computer Architecture Research in Academy and Industry" |
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9:45-10:15 Coffee Break |
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| 10:15-11:55 |
Session 1 |
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12:00-13:30 Lunch |
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13:45-15:25
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Session 2 |
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15:25-15:50 Coffee Break |
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| 15:50-17:30 |
Session 3 |
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18:00-20:00 |
Business Meeting SIGARCH-TCCA |
| 20:15 | ISCA Reception |
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Tuesday |
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| 8:00 - 9:00 |
ACM-W Athena Award Lecture Mary Jane Irwin: "Shared Caches in Multicores: The Good, The Bad, and The Ugly" |
| 9:10 - 10:00 |
Session 4 |
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10:00-10:30 Coffee Break |
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| 10:30-11:45 |
Session 5 |
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12:00-13:30 |
ACM-IEEE Eckert Mauchly Lunch award |
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13:30-14:30 |
Awards presentation |
| 14:30-16:00 | Panel: "La Microarchitecture est Morte. Longue Vie à la Microarchitecture" moderator Mark Hill |
| 18:00 |
ACM A.M. Turing Award Lecture: Charles P. Thacker, "Improving the Future by Examining the Past" |
| 20:30 | ACM A.M. Turing Award Lecture Reception |
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Wednesday |
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| 8:00 - 9:00 |
Keynote Olivier Temam, "The Rebirth of Neural Networks" |
| 9:10- 10:25 | Session 6 |
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10:25-10:55 Coffee Break |
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| 10:55- 12:35 | Session 7 |
| 12:35 | Conclusion |
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15:00 Excursion to Mont-Saint-Michel (back around 20:00) |
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Detailed Program
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Sunday |
|
|
18:30 - 21:00 |
Welcome Reception |
|
Monday |
|
|
8:30 |
Welcome Address |
|
8:45-9:45 |
Keynote Bill Dally, "Moving the needle: Effective Computer Architecture Research in Academe and Industry" |
|
9:45-10:15 Coffee Break |
|
| 10:15-11:55 |
Session 1: Energy Efficiency (Session Chair: Doug Burger) |
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WiDGET: Wisconsin Decoupled Grid Execution Tiles Yasuko (University of Wisconsin), John D. Davis (Microsoft Research), David A. Wood (University of Wisconsin) |
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Forwardflow: A Scalable Core for Power-Constrained CMPs Dan Gibson, David A. Wood (University of Wisconsin) |
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Energy-Performance Tradeoffs in Processor Architecture and Circuit Design: A Marginal Cost Analysis Omid Azizi (Stanford University), Aqeel Mahesri (University of Illinois), Benjamin C. Lee (Stanford University), Sanjay J. Patel (University of Illinois), Mark Horowitz (Stanford University) |
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Understanding Sources of Inefficiency in General-Purpose Chips Rehan Hameed, Wajahat Qadeer, Megan Wachs, Omid Azizi (Stanford University), Alex Solomatnikov (Hicamp Systems), Benjamin C. Lee, Stephen Richardson, Christos Kozyrakis, Mark Horowitz (Stanford University) |
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12:00-13:30 Lunch |
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13:45-15:25
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Session 2 |
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Session 2A |
Caches (Session Chair: Moinuddin Qureshi) |
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Translation Caching: Skip, Don't Walk (the Page Table) Thomas W. Barr, Alan L. Cox, Scott Rixner (Rice University) |
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High Performance Cache Replacement Using Re-Reference Interval Prediction (RRIP) Aamer Jaleel, Kevin Theobald, Simon Steely Jr., Joel Emer (Intel Corporation) |
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The Virtual Write Queue: Coordinating DRAM and Last-Level Cache Policies Jeff Stuecheli (University of Texas Austin/IBM Austin), Dimitris Kaseridis (University of Texas Austin), David Daly, Hillery Hunter (IBM Watson), Lizy K. John (University of Texas Austin) |
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Reducing Cache Power with Low-Cost, Multi-Bit Error Correcting Codes Chris Wilkerson, Alaa R Alameldeen, Zeshan Chishti, Wei Wu, Dinesh Somasekhar, Shih-Lien Lu (Intel Corporation) |
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Emerging Technologies and Interconnect (Session Chair: Olivier Temam) |
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| Session 2B |
An Intra-Chip Free-Space Optical Interconnect Jing Xue, Alok Garg, Berkehan Çiftçioğlu, Jianyun Hu, Shang Wang, Ioannis Savidis, Manish Jain, Rebecca Berman, Peng Liu, Michael Huang, Hui Wu, Eby Friedman, Gary Wicks, Duncan Moore (University of Rochester) |
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Aergia: Exploiting Packet Latency Slack in On-Chip Networks Reetuparna Das (Pennsylvania State University), Onur Mutlu (Carnegie Mellon University), Thomas Moscibroda (Microsoft Research), Chita Das (Pennsylvania State University) |
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Silicon-Photonic Network Architectures for Scalable, Power-Efficient Multi-Chip Systems Pranay Koka, Michael O. McCracken, Herb Schwetman, Xuezhe Zheng, Ron Ho, Ashok V. Krishnamoorthy (Sun Labs, Oracle) |
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Re-Architecting DRAM Memory Systems with Monolithically Integrated Silicon Photonics Scott Beamer (UC Berkeley), Chen Sun (MIT), Yong-jin Kwon (UC Berkeley), Ajay Joshi (Boston University), Christopher Batten (Cornell University), Vladimir Stojanovic (MIT), Krste Asanović (UC Berkeley) |
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15:25-15:50 Coffee Break |
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| 15:50-17:30 |
Session 3 |
| Session 3A | Memory Subsystems (Session Chair: Dean Tullsen) |
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Use ECP, not ECC, for Hard Failures in Memories Stuart Schechter (Microsoft Research), Gabriel H. Loh (Microsoft Research and Georgia Tech), Karin Strauss (Microsoft Research and University of Washington), Doug Burger (Microsoft Research) |
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Morphable Memory System: A Robust Architecture for Exploiting Multi-Level Phase Change Memories Moinuddin K. Qureshi, Michele Franceschini, Luis Lastras, John Karidis (IBM Research) |
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SieveStore: A Highly-Selective, Ensemble-level Disk Cache for Cost-Performance Timothy Pritchett, Mithuna Thottethodi (Purdue University) |
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Rethinking DRAM Design and Organization for Energy-Constrained Multi-Cores Aniruddha N. Udipi (University of Utah), Naveen Muralimanohar (HP Labs), Niladrish Chatterjee, Rajeev Balasubramonian, Al Davis (University of Utah), Norman P. Jouppi (HP Labs) |
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| Session 3B |
Productivity and Debugging (Session Chair: Josep Torrellas) |
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LReplay: A Pending Period Based Deterministic Replay Scheme Yunji Chen, Weiwu Hu (Chinese Academy of Sciences), Tianshi Chen (University of Science and Technology of China), Ruiyang Wu (Chinese Academy of Sciences) |
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Timetraveler: Exploiting Acyclic Races for Optimizing Memory Race Recording Gwendolyn Voskuilen, Faraz Ahmad, T.N. Vijaykumar (Purdue University) |
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Conflict Exceptions: Simplifying Concurrent Language Semantics with Precise Hardware Exceptions for Data Races Brandon Lucia, Luis Ceze (University of Washington), Karin Strauss, Shaz Qadeer (Microsoft Research and University of Washington), Hans-J. Boehm (HP Labs) |
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ColorSafe: Architectural Support for Debugging and Dynamically Avoiding Multi-variable Atomicity Violations Brandon Lucia, Luis Ceze (University of Washington), Karin Strauss (Microsoft Research and University of Washington) |
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18:00-20:00 |
Business Meeting SIGARCH-TCCA |
| 20:15 | ISCA Reception |
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Tuesday |
|
| 8:00 - 9:00 |
ACM-W Athena Award Lecture Mary Jane Irwin: "Shared Caches in Multicores: The Good, The Bad, and The Ugly" |
| 9:10 - 10:00 |
Session 4 |
| Session 4A |
Acceleration Architecture (Session Chair: Babak Falsafi) |
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Dynamic Warp Subdivision for Integrated Branch and Memory Divergence Tolerance Jiayuan Meng, David Tarjan, Kevin Skadron (University of Virginia) |
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A Dynamically Configurable Coprocessor for Convolutional Neural Networks Srimat Chakradhar, Murugan Sankaradas, Venkata Jakkula, Srihari Cadambi (NEC Laboratories America, Inc) |
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| Session 4B | Threading (Session Chair: Sanjay Patel) |
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RetCon: Transactional Repair without Replay Colin Blundell, Arun Raghavan, Milo M. K. Martin (University of Pennsylvania) |
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Thread Tailor: Dynamically Weaving Threads Together for Efficient, Adaptive Parallel Applications Janghaeng Lee, Haicheng Wu, Madhumitha Ravichandran, Nathan Clark (Georgia Tech.) |
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10:00-10:30 Coffee Break |
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| 10:30-11:45 |
Session 5 |
| Session 5A | Simulation Technologies and Real System Evaluation (Session Chair: Lieven Eeckhout) |
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An Integrated GPU Power and Performance Model Sunpyo Hong, Hyesoon Kim (Georgia Tech) |
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A Case for FAME: FPGA Architecture Model Execution Zhangxi Tan, Andrew Waterman, Henry Cook, Sarah Bird, Krste Asanović, David Patterson (University of California, Berkeley) |
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Evolution of Thread-Level Parallelism in Desktop Applications Geoffrey Blake, Ronald G. Dreslinski (University of Michigan), Krisztian Flautner (ARM Ltd.), Trevor Mudge (University of Michigan) |
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| Session 5B | Cluster and Data Center (Session Chair: David A. Wood) |
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Web Search Using Mobile Cores: Quantifying and Mitigating the Price of Efficiency Vijay Janapa Reddi (Harvard University), Benjamin C. Lee (Stanford University), Trishul Chilimbi (Microsoft Research), Kushagra Vaid (Microsoft) |
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The Impact of Management Operations on the Virtualized Datacenter Vijayaraghavan Soundararajan, Jennifer M. Anderson (VMware, Inc.) |
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Energy Proportional Datacenter Networks Dennis Abts, Mike Marty, Philip Wells, Peter Klausler, Hong Liu (Google Inc.) |
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12:00-13:30 |
ACM-IEEE Eckert Mauchly Lunch award |
|
13:30-14:30 |
Awards presentation |
| 14:30-16:00 | Panel: "La Microarchitecture est Morte. Longue Vie à la Microarchitecture" moderator Mark Hill |
| 18:00 |
ACM A.M. Turing Award Lecture: Charles P. Thacker, "Improving the Future by Examining the Past" |
| 20:30 | ACM A.M. Turing Award Lecture Reception |
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Wednesday |
|
| 8:00 - 9:00 |
Keynote Olivier Temam, "The Rebirth of Neural Networks" |
| 9:10- 10:25 | Session 6 |
| Session 6A | QOB (Session Chair: Onur Mutlu) |
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NoHype: Virtualized Cloud Infrastructure without the Virtualization Eric Keller, Jakub Szefer, Jennifer Rexford, Ruby B. Lee (Princeton University) |
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Modeling Critical Sections in Amdahl's Law and its Implications for Multicore Design Stijn Eyerman, Lieven Eeckhout (Ghent University) |
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Resistive Computation: Avoiding the Power Wall with Low-Leakage STT-MRAM Based Computing Xiaochen Guo, Engin İpek, Tolga Soyata (University of Rochester) |
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| Session 6B | Security (Session Chair: Hyesoon Kim) |
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Security Refresh: Prevent Malicious Wear-out and Increase Durability for Phase-Change Memory with Dynamically Randomized Address Mapping Nak Hee Seong, Dong Hyuk Woo, Hsien-Hsin S. Lee (Georgia Institute of Technology) |
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IVEC: Off-Chip Memory Integrity Protection for Both Security and Reliability Ruirui Huang, G. Edward Suh (Cornell University) |
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Sentry: Light-weight Auxiliary Memory Access Control Arrvindh Shriraman, Sandhya Dwarkadas (University of Rochester) |
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10:25-10:55 Coffee Break |
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| 10:55- 12:35 | Session 7 |
| Session 7A | Multi-Core (Session Chair: Doug Carmean) |
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Enric Herrero (Universitat Politècnica de Catalunya), José Gonzàlez (Intel Corporation), Ramon Canal (Universitat Politècnica de Catalunya) |
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Cohesion: A Hybrid Memory Model for Accelerators John H. Kelm, Daniel R. Johnson, William Tuohy, Steven S. Lumetta, Sanjay J. Patel (University of Illinois) |
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Data Marshaling for Multi-core Architectures M. Aater Suleman (University of Texas Austin), Onur Mutlu (Carnegie Mellon University), Jose A. Joao, Khubaib, Yale N. Patt (University of Texas Austin) |
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Debunking the 100X GPU vs. CPU Myth: An Evaluation of Throughput Computing on CPU and GPU Victor W Lee, Changkyu Kim, Jatin Chhugani, Michael Deisher, Daehyun Kim, Anthony D. Nguyen, Nadathur Satish, Mikhail Smelyanskiy, Srinivas Chennupaty, Per Hammarlund, Ronak Singhal, Pradeep Dubey (Intel Corporation) |
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| Session 7B | Reliability and Fault-tolerance (Session Chair: Yanos Sazeides) |
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Using Hardware Vulnerability Factors to Enhance AVF Analysis Vilas Sridharan, David R. Kaeli (Northeastern University) |
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Necromancer: Enhancing System Throughput by Animating Dead Cores Amin Ansari, Shuguang Feng, Shantanu Gupta, Scott Mahlke (University of Michigan) |
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Leveraging the Core-Level Complementary Effects of PVT Variations to Reduce Timing Emergencies in Multi-Core Processors Guihai Yan (Chinese Academy of Sciences), Xiaoyao Liang (NVIDIA), Yinhe Han, Xiaowei Li (Chinese Academy of Sciences) |
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Relax: An Architectural Framework for Software Recovery of Hardware Faults Marc de Kruijf, Shuou Nomura, Karthikeyan Sankaralingam (University of Wisconsin) |
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| 12:35 | Conclusion |
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15:00 Excursion to Mont-Saint-Michel (back around 20:00) |
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